At present, in order to solve the problem that the integrated circuit of a small-sized display product has a high cost, generally a data line (IC data line) of the integrated circuit is employed to push a plurality of data lines (panel data lines) on a panel of the display product to thus drive the panel.
The specific layout manner is to mate one IC output fan-out line to N data lines on the panel by using N groups of switching TFTs (Thin Film Transistors), and thus to implement charging of N rows of data on the panel by controlling the time sequence. In practice, however, since the N groups of TFTs can only be turned on sequentially, the second to the Nth turned-on TFTs may, due to data line parasitic capacitance and the like, charge incorrect data to the pixels within the duration when the first TFT is turned on, thereby affecting display of the screen. As such, the panel needs to be pre-charged, such that image display is normal. The layout for this generally is: N groups of TFTs are connected in series to the N data lines, and source voltages and drain voltages of these TFTs are respectively refresh voltages needed for the data lines and the pre-charge. Such layout consumes a large space, which is a great challenge for the display product having a small size. For implementing the pre-charge function of the panel, a traditional approach is to additionally configure a circuit for switching signals on the basis of the original circuit layout, but the additional circuit may occupy a very large space.
FIG. 1 is a schematic diagram illustrating circuit modules of a display device in the related art. FIG. 2 is a schematic diagram illustrating coupling of a data driver in the display device in the related art. As illustrated in FIG. 1 and FIG. 2, a conventional display device includes: a pixel array, a test circuit 2′, a gate driver 3′, a light-emitting control driver 4′ and a data driver 5′. The pixel array is arranged at a crossed region of the gate line and the data line, and is arranged in a display region 1′ of the display device. The gate driver 3′ is configured to provide a gate signal to the gate line. The test circuit 2′ is respectively coupled to a first input line 6′ and a second input line 7′ of the data driver 5′. The first input line 6′ is configured to transmit a test signal, the second input line 7′ is configured to transmit a test control signal, and the test circuit 2′ is configured to provide the test signal to the data line based on the test control signal. A first power line 8′ in the data driver 5′ is configured to supply an initial voltage to the pixels. The light-emitting control driver 4′ is arranged on the panel to face the gate driver 3′, the pixel array is inserted between the light-emitting control driver 4′ and the gate driver 3′, and the light-emitting control driver 4′ is configured to provide a light-emitting control signal to a light-emitting control line parallel to the gate line. The data driver 5′ is arranged on the panel to face the test circuit 2′, wherein the pixel array is inserted between the data driver 5′ and the test circuit 2′, and the data driver 5′ is configured to provide a data signal to the data line in the panel.
Still referring to FIG. 2, six first input lines 6′ (D1, D2, D3, D4, D5 and D6) of the data driver 5′ are respectively coupled to the display region 1′ via six second transistors 12′, and gates of the second transistors 12′ are respectively coupled to the corresponding second input lines 7′. The six second transistors 12′ are configured to control enable time of the data lines of the test circuit, and are coupled to gates of respective TFT transistors.
FIG. 3 is a schematic diagram illustrating pre-charge time sequence coupling of the display device in the related art. As illustrated in FIG. 3, before scanning signals are enabled, all the six second transistors 12′ need to be firstly enabled, and additionally the voltage of the data lines needs to be pulled to a minimum voltage. STV, CKV1 and CKV2 are input signals of the gate driver 3′, and STE, CKE1 and CKE2 are input signals of the light-emitting control driver 4′. Signals SW1-SW6 are control signals of the six second transistors 12′. The time scale in FIG. 3 may be adjusted according to the resolution, and the voltage may also be adjusted. However, such integrated circuit has a complicated time sequence, which increases power consumption of the integrated circuit.
In view of the above, the present inventor aims to provide a display device that may be pre-charged by using a conventional test circuit.